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picadae/tiny/i2c_timer_pwm.c : Added 'hold_state' to cleanly set the enable/disable PCM.

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This commit is contained in:
kevin.larke 2019-11-18 09:36:58 -05:00
parent db1ab31279
commit 3851812b8e
1 changed files with 22 additions and 10 deletions
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28
control/tiny/i2c_timer_pwm.c
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@ -6,8 +6,8 @@
AT TINY 85 AT TINY 85
+--\/--+ +--\/--+
RESET _| 1 8 |_ +5V RESET _| 1 8 |_ +5V
~OC1B HOLD DDB3 _| 2 7 |_ SCL yellow ~OC1B HOLD PINB3 _| 2 7 |_ SCL yellow
OC1B ONSET DDB4 _| 3 6 |_ DDB1 LED OC1B ONSET PINB4 _| 3 6 |_ PINB1 LED
GND _| 4 5 |_ SDA orange GND _| 4 5 |_ SDA orange
+------+ +------+
* = Serial and/or programming pins on Arduino as ISP * = Serial and/or programming pins on Arduino as ISP
@ -201,6 +201,9 @@ volatile uint8_t tmr0_coarse_cur = 0;
#define set_attack() do { ctl_regs[kState_idx] |= kState_Attk_Fl; PORTB |= _BV(ATTK_PIN); } while(0) #define set_attack() do { ctl_regs[kState_idx] |= kState_Attk_Fl; PORTB |= _BV(ATTK_PIN); } while(0)
#define clear_attack() do { PORTB &= ~_BV(ATTK_PIN); ctl_regs[kState_idx] &= ~kState_Attk_Fl; } while(0) #define clear_attack() do { PORTB &= ~_BV(ATTK_PIN); ctl_regs[kState_idx] &= ~kState_Attk_Fl; } while(0)
volatile uint8_t hold_state = 0; // state=0 hold should not be set, state=1 hold can be set
#define clear_hold() PORTB &= ~(_BV(HOLD_PIN))
#define set_hold() PORTB |= _BV(HOLD_PIN)
// Use the current tmr0 ctl_reg[] values to set the timer to the starting state. // Use the current tmr0 ctl_reg[] values to set the timer to the starting state.
void tmr0_reset() void tmr0_reset()
@ -208,6 +211,8 @@ void tmr0_reset()
tmr0_coarse_cur = 0; // clear the coarse time counter tmr0_coarse_cur = 0; // clear the coarse time counter
ctl_regs[kState_idx] |= kState_Attk_Fl; // set the attack state ctl_regs[kState_idx] |= kState_Attk_Fl; // set the attack state
PORTB |= _BV(ATTK_PIN); // set the attack pin PORTB |= _BV(ATTK_PIN); // set the attack pin
clear_hold(); // clear the hold pin
hold_state = 0;
// if a coarse count exists then go into coarse mode // if a coarse count exists then go into coarse mode
if( ctl_regs[kTmr_Coarse_idx] > 0 ) if( ctl_regs[kTmr_Coarse_idx] > 0 )
@ -249,7 +254,8 @@ ISR(TIMER0_COMPA_vect)
clear_attack(); clear_attack();
TCNT1 = 0; TCNT1 = 0; // reset the PWM counter to 0
hold_state = 1; // enable the hold output
TIMSK |= _BV(OCIE1B) + _BV(TOIE1); // PWM interupt Enable interrupts TIMSK |= _BV(OCIE1B) + _BV(TOIE1); // PWM interupt Enable interrupts
TIMSK &= ~_BV(OCIE0A); // clear timer interrupt TIMSK &= ~_BV(OCIE0A); // clear timer interrupt
@ -288,13 +294,14 @@ void pwm1_update()
// At this point TCNT1 is reset to 0, new OCR1B values are latched from temp. loctaion to OCR1B // At this point TCNT1 is reset to 0, new OCR1B values are latched from temp. loctaion to OCR1B
ISR(TIMER1_OVF_vect) ISR(TIMER1_OVF_vect)
{ {
PORTB &= ~(_BV(HOLD_PIN)); // clear PWM pin clear_hold();
} }
// Called when TCN1 == OCR1B // Called when TCNT1 == OCR1B
ISR(TIMER1_COMPB_vect) ISR(TIMER1_COMPB_vect)
{ {
PORTB |= _BV(HOLD_PIN); // set PWM pin if(hold_state)
set_hold();
} }
@ -309,6 +316,7 @@ void pwm1_init()
GTCCR |= _BV(PSR1); // Set the pre-scaler to the selected value GTCCR |= _BV(PSR1); // Set the pre-scaler to the selected value
pwm1_update(); pwm1_update();
} }
//------------------------------------------------------------------------------ //------------------------------------------------------------------------------
@ -453,9 +461,11 @@ void on_receive( uint8_t byteN )
// if the PWM prescaler was changed // if the PWM prescaler was changed
if( i == 3 ) if( i == 3 )
{
cli(); cli();
pwm1_init(); pwm1_init();
sei(); sei();
}
pwm1_update(); pwm1_update();
break; break;
@ -473,17 +483,19 @@ void on_receive( uint8_t byteN )
} }
// if a prescaler was included then the timer needs to be re-initialized // if a prescaler was included then the timer needs to be re-initialized
if( i == 3 ) if( i == 3 )
{
cli(); cli();
tmr0_init(); tmr0_init();
sei(); sei();
}
tmr0_reset(); tmr0_reset();
break; break;
case kNoteOff_Op: case kNoteOff_Op:
TIMSK &= ~_BV(OCIE0A); // clear timer interrupt (shouldn't be necessary) TIMSK &= ~_BV(OCIE0A); // clear timer interrupt (shouldn't be necessary)
TIMSK &= ~(_BV(OCIE1B) + _BV(TOIE1)); // PWM interupt disable interrupts //TIMSK &= ~(_BV(OCIE1B) + _BV(TOIE1)); // PWM interupt disable interrupts
PORTB &= ~_BV(HOLD_PIN); // clear the HOLD pin hold_state = 0;
break; break;
case kSetReadAddr_Op: case kSetReadAddr_Op: