560 lines
15 KiB
C
560 lines
15 KiB
C
// w 60 0 1 10 : w i2c_addr SetPWM enable duty_val
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// w 60 5 12 8 32 : w i2c_addr write addrFl|src coarse_val
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// w 60 4 0 5 : w i2c_addr read src read_addr (set the read address to register 5)
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// r 60 4 3 : r i2c_addr <dum> cnt (read the first 3 reg's beginning w/ 5)
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/*
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AT TINY 85
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+--\/--+
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RESET _| 1 8 |_ +5V
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~OC1B HOLD DDB3 _| 2 7 |_ SCL yellow
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OC1B ONSET DDB4 _| 3 6 |_ DDB1 LED
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GND _| 4 5 |_ SDA orange
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+------+
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* = Serial and/or programming pins on Arduino as ISP
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*/
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// This program acts as the device (slave) for the control program i2c/a2a/c_ctl
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#define F_CPU 16000000L
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#include <stdio.h>
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#include <avr/io.h>
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#include <util/delay.h>
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#include <avr/interrupt.h>
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#include "usiTwiSlave.h"
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#define HOLD_DIR DDB3
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#define ATTK_DIR DDB4
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#define LED_DIR DDB1
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#define HOLD_PIN PINB3
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#define ATTK_PIN PINB4
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#define LED_PIN PINB1
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// Opcodes
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enum
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{
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kSetPwm_Op = 0, // Set PWM duty/hz/div 0 {<duty> {<freq> {<div>}}} div:2=2,3=4,4=8,5=16,6=32,7=64,8=128,9=256,10=512,11=1024,12=2048,13=4096,14=8192,15=16384
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kNoteOnVel_Op = 1, // Turn on note 3 {<vel>}
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kNoteOnUsec_Op = 2, // Turn on note 4 {<coarse> {<fine> {<prescale>}}}
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kNoteOff_Op = 3, // Turn off note 5
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kSetReadAddr_Op = 4, // Set a read addr. 6 {<src>} {<addr>} } src: 0=reg 1=table 2=eeprom
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kWrite_Op = 5, // Set write 7 {<addrfl|src> {addr} {<value0> ... {<valueN>}} addrFl:0x80 src: 4=reg 5=table 6=eeprom
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kWriteTable_Op = 6, // Write table to EEprom 9
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kInvalid_Op = 7 //
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};
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enum
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{
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kReg_Rd_Addr_idx = 0, // Next Reg Address to read
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kTable_Rd_Addr_idx = 1, // Next Table Address to read
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kEE_Rd_Addr_idx = 2, // Next EEPROM address to read
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kRead_Src_idx = 3, // kReg_Rd_Addr_idx=reg, kTable_Rd_Addr_idx=table, kEE_Rd_Addr_idx=eeprom
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kReg_Wr_Addr_idx = 4, // Next Reg Address to write
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kTable_Wr_Addr_idx = 5, // Next Table Address to write
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kEE_Wr_Addr_idx = 6, // Next EEPROM address to write
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kWrite_Dst_idx = 7, // kReg_Wr_Addr_idx=reg, kTable_Wr_Addr_idx=table, kEE_Wr_Addr_idx=eeprom
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kTmr_Coarse_idx = 8, //
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kTmr_Fine_idx = 9, //
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kTmr_Prescale_idx = 10, // Timer 0 clock divider: 1=1,2=8,3=64,4=256,5=1024 Default: 4 (16us)
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kPwm_Duty_idx = 11, //
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kPwm_Freq_idx = 12, //
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kPwm_Div_idx = 13, //
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kState_idx = 14, // 1=attk 2=hold
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kError_Code_idx = 15, // Error Code
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kMax_Coarse_Tmr_idx = 16, // Max. allowable coarse timer value
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kMax_idx
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};
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enum
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{
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kState_Attk_Fl = 1,
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kState_Hold_Fl = 2
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};
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volatile uint8_t ctl_regs[] =
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{
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0, // 0 (0-(kMax_idx-1)) Reg Read Addr
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0, // 1 (0-255) Table Read Addr
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0, // 2 (0-255) EE Read Addr
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kReg_Rd_Addr_idx, // 3 (0-2) Read source
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0, // 4 (0-(kMax_idx-1)) Reg Write Addr
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0, // 5 (0-255) Table Write Addr
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0, // 6 (0-255) EE Write Addr
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kReg_Wr_Addr_idx, // 7 (0-2) Write source
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5, // 8 (0-255) Timer 0 Coarse Value (20400 us)
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0, // 9 (0-255) Timer 0 Fine Value
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4, // 10 (1-5) 4=16us per tick
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127, // 11 (0-255) Pwm Duty cycle
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254, // 12 (0-255) Pwm Frequency (123 Hz)
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10, // 13 (0-15) Pwm clock div
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0, // 14 state flags 1=attk 2=hold (read/only)
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0, // 15 (0-255) Error bit field
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14, // 16 (0-255) Max allowable coarse timer count
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};
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// These registers are saved to Eeprom
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uint8_t eeprom_addr[] =
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{
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kTmr_Prescale_idx,
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kPwm_Duty_idx,
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kPwm_Freq_idx,
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kPwm_Div_idx
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};
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#define tableN 256
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uint8_t table[ tableN ]; // [ coarse_0,fine_0, coarse_1, fine_1, .... coarse_127,fine_127]
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enum
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{
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kInvalid_Read_Src_ErrFl = 0x01,
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kInvalid_Write_Dst_ErrFl = 0x02,
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kInvalid_Coarse_Tmr_ErrFl = 0x04
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};
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#define set_error( flag ) ctl_regs[ kError_Code_idx ] |= (flag)
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//------------------------------------------------------------------------------
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//------------------------------------------------------------------------------
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//------------------------------------------------------------------------------
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//
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// EEPROM
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//
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void EEPROM_write(uint8_t ucAddress, uint8_t ucData)
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{
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// Wait for completion of previous write
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while(EECR & (1<<EEPE))
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{}
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EECR = (0<<EEPM1)|(0<<EEPM0); // Set Programming mode
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EEAR = ucAddress; // Set up address and data registers
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EEDR = ucData;
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EECR |= (1<<EEMPE); // Write logical one to EEMPE
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EECR |= (1<<EEPE); // Start eeprom write by setting EEPE
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}
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uint8_t EEPROM_read(uint8_t ucAddress)
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{
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// Wait for completion of previous write
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while(EECR & (1<<EEPE))
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{}
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EEAR = ucAddress; // Set up address register
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EECR |= (1<<EERE); // Start eeprom read by writing EERE
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return EEDR; // Return data from data register
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}
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void write_table()
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{
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uint8_t i;
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uint8_t regN = sizeof(eeprom_addr);
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// write the persistent registers
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for(i=0; i<regN; ++i)
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EEPROM_write( i, ctl_regs[ eeprom_addr[i] ] );
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// write the table
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for(i=0; i<tableN; ++i)
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EEPROM_write( regN+i, table[i] );
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}
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void load_table()
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{
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uint8_t i;
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uint8_t regN = sizeof(eeprom_addr);
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// read the persistent registers
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for(i=0; i<regN; ++i)
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ctl_regs[ eeprom_addr[i] ] = EEPROM_read(i);
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// read the tabke
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for(i=0; i<tableN; ++i)
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table[i] = EEPROM_read(regN + i);
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}
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//------------------------------------------------------------------------------
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//------------------------------------------------------------------------------
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//------------------------------------------------------------------------------
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//
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// Timer0
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//
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volatile uint8_t tmr0_state = 0; // current timer mode: 0=disabled 1=coarse mode, 2=fine mode
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volatile uint8_t tmr0_coarse_cur = 0;
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#define set_attack() do { ctl_regs[kState_idx] |= kState_Attk_Fl; PORTB |= _BV(ATTK_PIN); } while(0)
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#define clear_attack() do { PORTB &= ~_BV(ATTK_PIN); ctl_regs[kState_idx] &= ~kState_Attk_Fl; } while(0)
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// Use the current tmr0 ctl_reg[] values to set the timer to the starting state.
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void tmr0_reset()
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{
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tmr0_coarse_cur = 0; // clear the coarse time counter
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ctl_regs[kState_idx] |= kState_Attk_Fl; // set the attack state
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PORTB |= _BV(ATTK_PIN); // set the attack pin
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// if a coarse count exists then go into coarse mode
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if( ctl_regs[kTmr_Coarse_idx] > 0 )
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{
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tmr0_state = 1;
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OCR0A = 0xff;
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}
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else // otherwise go into fine mode
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{
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tmr0_state = 2;
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OCR0A = ctl_regs[kTmr_Fine_idx];
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}
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TIMSK |= _BV(OCIE0A); // enable the timer interrupt
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}
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ISR(TIMER0_COMPA_vect)
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{
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switch( tmr0_state )
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{
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case 0:
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// timer is disabled
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break;
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case 1:
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// coarse mode
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if( ++tmr0_coarse_cur >= ctl_regs[kTmr_Coarse_idx] )
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{
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tmr0_state = 2;
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OCR0A = ctl_regs[kTmr_Fine_idx];
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}
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break;
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case 2:
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// fine mode
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// This marks the end of a timer period
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clear_attack();
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TIMSK |= _BV(OCIE1B) + _BV(TOIE1); // PWM interupt Enable interrupts
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TIMSK &= ~_BV(OCIE0A); // clear timer interrupt
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break;
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}
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}
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void tmr0_init()
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{
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TIMSK &= ~_BV(OCIE0A); // Disable interrupt TIMER1_OVF
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TCCR0A |= 0x02; // CTC mode
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TCCR0B |= ctl_regs[kTmr_Prescale_idx]; // set the prescaler
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GTCCR |= _BV(PSR0); // Set the pre-scaler to the selected value
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}
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//------------------------------------------------------------------------------
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//------------------------------------------------------------------------------
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//------------------------------------------------------------------------------
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//
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// Pwm
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//
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// PWM is optimized to use pins OC1A ,~OC1A, OC1B, ~OC1B
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// but since these pins are not available this code uses
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// ISR's to redirect the output to PIN3
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void pwm1_update()
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{
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OCR1B = ctl_regs[kPwm_Duty_idx]; // control duty cycle
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OCR1C = ctl_regs[kPwm_Freq_idx]; // PWM frequency pre-scaler
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}
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ISR(TIMER1_OVF_vect)
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{
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PORTB |= _BV(HOLD_PIN); // set PWM pin
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}
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ISR(TIMER1_COMPB_vect)
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{
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PORTB &= ~(_BV(HOLD_PIN)); // clear PWM pin
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}
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void pwm1_init()
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{
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TIMSK &= ~(_BV(OCIE1B) + _BV(TOIE1)); // Disable interrupts
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DDRB |= _BV(HOLD_DIR); // setup PB3 as output
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// set on TCNT1 == 0 // happens when TCNT1 matches OCR1C
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// clr on OCR1B == TCNT // happens when TCNT1 matches OCR1B
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// // COM1B1=1 COM1B0=0 (enable output on ~OC1B)
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TCCR1 |= ctl_regs[ kPwm_Div_idx]; // 32us period (512 divider) prescaler
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GTCCR |= _BV(PWM1B); // Enable PWM B and disconnect output pins
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GTCCR |= _BV(PSR1); // Set the pre-scaler to the selected value
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pwm1_update();
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}
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//------------------------------------------------------------------------------
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//------------------------------------------------------------------------------
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//------------------------------------------------------------------------------
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// Tracks the current register pointer position
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volatile uint8_t reg_position = 0;
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const uint8_t reg_size = sizeof(ctl_regs);
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//
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// Read Request Handler
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//
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// This is called for each read request we receive, never put more
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// than one byte of data (with TinyWireS.send) to the send-buffer when
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// using this callback
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//
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void on_request()
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{
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uint8_t val = 0;
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switch( ctl_regs[ kRead_Src_idx ] )
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{
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case kReg_Rd_Addr_idx:
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val = ctl_regs[ ctl_regs[kReg_Rd_Addr_idx] ];
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break;
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case kTable_Rd_Addr_idx:
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val = table[ ctl_regs[kTable_Rd_Addr_idx] ];
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break;
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case kEE_Rd_Addr_idx:
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val = EEPROM_read(ctl_regs[kEE_Rd_Addr_idx]);
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break;
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default:
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set_error( kInvalid_Read_Src_ErrFl );
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return;
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}
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usiTwiTransmitByte(val);
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ctl_regs[ ctl_regs[ kRead_Src_idx ] ] += 1;
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}
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void _write_op( uint8_t* stack, uint8_t stackN )
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{
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uint8_t stack_idx = 0;
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if( stackN > 0 )
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{
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uint8_t src = stack[0] & 0x07;
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uint8_t addr_fl = stack[0] & 0x08;
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// verify the source value
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if( src < kReg_Wr_Addr_idx || src > kEE_Wr_Addr_idx )
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{
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set_error( kInvalid_Write_Dst_ErrFl );
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return;
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}
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// set the write source
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stack_idx = 1;
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ctl_regs[ kWrite_Dst_idx ] = src;
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// if an address value was passed also ....
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if( addr_fl && stackN > 1 )
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{
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stack_idx = 2;
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ctl_regs[ src ] = stack[1];
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}
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}
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//
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for(; stack_idx<stackN; ++stack_idx)
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{
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uint8_t addr_idx = ctl_regs[ ctl_regs[kWrite_Dst_idx] ]++;
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uint8_t val = stack[ stack_idx ];
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switch( ctl_regs[ kWrite_Dst_idx ] )
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{
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case kReg_Wr_Addr_idx: ctl_regs[ addr_idx ] = val; break;
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case kTable_Wr_Addr_idx: table[ addr_idx ] = val; break;
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case kEE_Wr_Addr_idx: EEPROM_write( table[ addr_idx ], val); break;
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default:
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set_error( kInvalid_Write_Dst_ErrFl );
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break;
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}
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}
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}
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//
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// The I2C data received -handler
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//
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// This needs to complete before the next incoming transaction (start,
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// data, restart/stop) on the bus does so be quick, set flags for long
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// running tasks to be called from the mainloop instead of running
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// them directly,
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//
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void on_receive( uint8_t byteN )
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{
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PINB = _BV(LED_PIN); // writes to PINB toggle the pins
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const uint8_t stackN = 16;
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uint8_t stack_idx = 0;
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uint8_t stack[ stackN ];
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uint8_t i;
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if (byteN < 1 || byteN > TWI_RX_BUFFER_SIZE)
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{
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// Sanity-check
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return;
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}
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// get the register index to read/write
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uint8_t op_id = usiTwiReceiveByte();
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byteN--;
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// If only one byte was received then this was a read request
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// and the buffer pointer (reg_position) is now set to return the byte
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// at this location on the subsequent call to on_request() ...
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if(byteN)
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{
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while( byteN-- )
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{
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stack[stack_idx] = usiTwiReceiveByte();
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++stack_idx;
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}
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}
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switch( op_id )
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{
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case kSetPwm_Op:
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for(i=0; i<stack_idx && i<3; ++i)
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ctl_regs[ kPwm_Duty_idx + i ] = stack[i];
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// if the PWM prescaler was changed
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if( i == 3 )
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pwm1_init();
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pwm1_update();
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break;
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case kNoteOnUsec_Op:
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for(i=0; i<stack_idx && i<3; ++i)
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ctl_regs[ kTmr_Coarse_idx + i ] = stack[i];
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// validate the coarse error value
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if( ctl_regs[ kTmr_Coarse_idx ] > ctl_regs[ kMax_Coarse_Tmr_idx ])
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{
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ctl_regs[ kTmr_Coarse_idx ] = ctl_regs[ kMax_Coarse_Tmr_idx ];
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set_error( kInvalid_Coarse_Tmr_ErrFl );
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}
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// if a prescaler was included then the timer needs to be re-initialized
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if( i == 3 )
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tmr0_init();
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tmr0_reset();
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break;
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case kNoteOff_Op:
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TIMSK &= ~_BV(OCIE0A); // clear timer interrupt (shouldn't be necessary)
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TIMSK &= ~(_BV(OCIE1B) + _BV(TOIE1)); // PWM interupt disable interrupts
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PORTB &= ~_BV(HOLD_PIN); // clear the HOLD pin
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break;
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case kSetReadAddr_Op:
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if( stack_idx > 0 )
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{
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ctl_regs[ kRead_Src_idx ] = stack[0];
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if( stack_idx > 1 )
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ctl_regs[ ctl_regs[ kRead_Src_idx ] ] = stack[1];
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}
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break;
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case kWrite_Op:
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_write_op( stack, stack_idx );
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break;
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case kWriteTable_Op:
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write_table();
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break;
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}
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}
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int main(void)
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{
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cli(); // mask all interupts
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DDRB |= _BV(ATTK_DIR) + _BV(HOLD_DIR) + _BV(LED_DIR); // setup PB4,PB3,PB1 as output
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PORTB &= ~(_BV(ATTK_PIN) + _BV(HOLD_PIN) + _BV(LED_PIN)); // clear output pins
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tmr0_init();
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pwm1_init();
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// setup i2c library
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usi_onReceiverPtr = on_receive;
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usi_onRequestPtr = on_request;
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usiTwiSlaveInit(I2C_SLAVE_ADDRESS);
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|
|
|
sei();
|
|
|
|
PINB = _BV(LED_PIN); // writes to PINB toggle the pins
|
|
_delay_ms(1000);
|
|
PINB = _BV(LED_PIN); // writes to PINB toggle the pins
|
|
|
|
|
|
while(1)
|
|
{
|
|
|
|
if (!usi_onReceiverPtr)
|
|
{
|
|
// no onReceive callback, nothing to do...
|
|
continue;
|
|
}
|
|
|
|
if (!(USISR & ( 1 << USIPF )))
|
|
{
|
|
// Stop not detected
|
|
continue;
|
|
}
|
|
|
|
|
|
uint8_t amount = usiTwiAmountDataInReceiveBuffer();
|
|
if (amount == 0)
|
|
{
|
|
// no data in buffer
|
|
continue;
|
|
}
|
|
|
|
|
|
usi_onReceiverPtr(amount);
|
|
|
|
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
|
|
|