picadae_cmd.py : changed serial output to show all received data in integer format.
ctrl/main.c : write commands now send as many data bytes as received rather than just 2. tiny/main.c : Added timer0 and PCM1 options. Added table and EEPROM reading/writing. tiny/Makefile: Enabled 'brown-out-detection'.
This commit is contained in:
kevin.larke
parent
61758bb9de
commit
ffd46bf3b6
@ -190,6 +190,7 @@ class App:
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coarse = int(value/(32*254))
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fine = int((value - coarse*32*254)/32)
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print(coarse,fine)
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dataL = [ coarse, fine ]
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elif opcode == 'd':
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@ -272,7 +273,6 @@ class App:
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op_byteN = len(dataL)
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# form the command into a byte array
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cmd_bV = bytearray( [ ord(op_code), i2c_addr, reg_addr, op_byteN ] + dataL )
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@ -293,7 +293,7 @@ class App:
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if (i):
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s = sys.stdin.readline().strip()
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if s == 'quit':
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if s == 'quit' or s == 'q':
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break
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cmd_bV,err_msg = self.parse_cmd(s)
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@ -310,7 +310,11 @@ class App:
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# if a serial msg was received
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if msg is not None and msg[0] == DATA_MSG:
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print("ser:",msg[1],int(msg[1][0]))
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str = ""
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for i in range(len(msg[1])):
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str += "{} ".format(int(msg[1][i]))
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print("ser:",str)
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self.serialProc.quit()
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@ -20,7 +20,7 @@ volatile int ser_buf_i_idx = 0; // receive buffer input index
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int ser_buf_o_idx = 0; // receive buffer output index
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// Receive buffer
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char buf[ SER_BUF_N ];
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char ser_buf[ SER_BUF_N ];
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void uart_init(void)
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@ -105,7 +105,7 @@ void i2c_init()
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ISR(USART_RX_vect)
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{
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// receive the incoming byte
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buf[ ser_buf_i_idx ] = uart_getchar();
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ser_buf[ ser_buf_i_idx ] = uart_getchar();
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// advance the buffer input index
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ser_buf_i_idx = (ser_buf_i_idx + 1) % SER_BUF_N;
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@ -141,13 +141,16 @@ int main (void)
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const uint8_t kWaitFl = 1;
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const uint8_t kSendStopFl = 1;
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const uint8_t kNoSendStopFl = 0;
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const uint8_t data_bufN = 0xff;
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char c;
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uint8_t state = kWait_for_cmd;
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char cmd;
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uint8_t i2c_addr;
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uint8_t dev_reg_addr;
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uint8_t op_byte_cnt;
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uint8_t state = kWait_for_cmd; // parser state
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char cmd; // 'r' or 'w'
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uint8_t i2c_addr; // remote i2c address
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uint8_t dev_reg_addr; // remote device register address
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uint8_t op_byte_cnt; // count of data bytes to send or recv
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uint8_t data_buf[ data_bufN ]; // hold data during parsing
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uint8_t data_buf_idx = 0; // next avail slot in the data buffer
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cli(); // mask all interupts
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@ -173,14 +176,14 @@ int main (void)
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if( ser_buf_o_idx != ser_buf_i_idx )
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{
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// get the waiting byte
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c = buf[ser_buf_o_idx];
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c = ser_buf[ser_buf_o_idx];
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// advance the buffer output index
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ser_buf_o_idx = (ser_buf_o_idx+1) % SER_BUF_N;
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// Serial Protocol
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// 'r', reg-idx, cnt, -> i2c_read_from()
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// 'w', reg-idx, cnt, value0, ... valueN -> i2c_xmit()
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// 'r', i2c-addr, reg-idx, cnt, -> i2c_read_from()
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// 'w', i2c-addr, reg-idx, cnt, value0, ... valueN -> i2c_xmit()
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switch(state)
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{
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@ -191,7 +194,7 @@ int main (void)
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state = kWait_for_i2c;
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}
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else
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uart_putchar('E');
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uart_putchar('E'); // indicate a protocol error
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break;
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case kWait_for_i2c:
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@ -215,16 +218,30 @@ int main (void)
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else
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{
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state = kWait_for_value;
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data_buf[0] = dev_reg_addr; // make 'dev_reg_addr' the first data value to write
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data_buf_idx = 1; //
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op_byte_cnt += 1; // incr op_byte_cnt to account for 'dev_reg_addr' as first byte
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}
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break;
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case kWait_for_value:
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if( data_buf_idx >= data_bufN )
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{
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uint8_t buf[] = { dev_reg_addr, c };
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i2c_xmit( I2C_REMOTE_ADDR, buf, 2, kSendStopFl);
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uart_putchar('F'); // indicate a buffer overrun
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state = kWait_for_cmd;
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}
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else
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{
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data_buf[ data_buf_idx++ ] = c;
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if(data_buf_idx == op_byte_cnt )
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{
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i2c_xmit( I2C_REMOTE_ADDR, data_buf, op_byte_cnt, kSendStopFl);
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state = kWait_for_cmd;
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}
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}
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break;
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}
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@ -22,7 +22,7 @@ all:
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$(OBJ2HEX) -R .eeprom -O ihex $(TARGET) $(TARGET).hex
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burn:
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$(AVRDUDE) -p $(MCU) -P $(TTY) -C/etc/avrdude/avrdude.conf -v -c avrisp -b 19200 -U flash:w:$(TARGET).hex -U lfuse:w:0xe2:m -U hfuse:w:0xdf:m -U efuse:w:0xff:m
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$(AVRDUDE) -p $(MCU) -P $(TTY) -C/etc/avrdude/avrdude.conf -v -c avrisp -b 19200 -U flash:w:$(TARGET).hex -U lfuse:w:0xe2:m -U hfuse:w:0xdd:m -U efuse:w:0xff:m
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clean:
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rm -f *.hex *.obj *.o
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@ -1,3 +1,15 @@
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/*
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AT TINY 85
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+--\/--+
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RESET _| 1 8 |_ +5V
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~OC1B HOLD DDB3 _| 2 7 |_ SCL
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OC1B ONSET DDB4 _| 3 6 |_ DDB1 LED
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GND _| 4 5 |_ SDA
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+------+
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* = Serial and/or programming pins on Arduino as ISP
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*/
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// This program acts as the device (slave) for the control program i2c/a2a/c_ctl
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#define F_CPU 8000000L
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#include <stdio.h>
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@ -7,100 +19,226 @@
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#include "usiTwiSlave.h"
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#define I2C_SLAVE_ADDRESS 0x8 // the 7-bit address (remember to change this when adapting this example)
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enum
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{
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kCS13_10_idx = 0, // Timer 1 Prescalar (CS13,CS12,CS11,CS10) from Table 12-5 pg 89 (0-15) prescaler = pow(2,val-1), 0=stop,1=1,2=2,3=4,4=8,....14=8192,15=16384 pre_scaled_hz = clock_hz/value
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kTmr0_Coarse_idx = 1, // count of times timer0 count to 255 before OCR1C is set to Tmr0_Fine
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kTmr0_Fine_idx = 2, // OCR1C timer match value
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kPWM_Duty_idx = 3, //
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kPWM_Freq_idx = 4, // 1-4 = clock divider=1=1,2=8,3=64,4=256,5=1024
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kTmr0_Prescale_idx = 0, // Timer 0 clock divider: 1=1,2=8,3=64,4=256,5=1024
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kTmr0_Coarse_idx = 1, //
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kTmr0_Fine_idx = 2, //
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kPWM0_Duty_idx = 3, //
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kPWM0_Freq_idx = 4, // 1-4 = clock divider=1=1,2=8,3=64,4=256,5=1024
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kCS13_10_idx = 5, // Timer 1 Prescalar (CS13,CS12,CS11,CS10) from Table 12-5 pg 89 (0-15) prescaler = pow(2,val-1), 0=stop,1=1,2=2,3=4,4=8,....14=8192,15=16384 pre_scaled_hz = clock_hz/value
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kTmr1_Coarse_idx = 6, // count of times timer0 count to 255 before OCR1C is set to Tmr0_Fine
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kTmr1_Fine_idx = 7, // OCR1C timer match value
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kPWM1_Duty_idx = 8, //
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kPWM1_Freq_idx = 9, //
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kTable_Addr_idx = 10, // Next table address to read/write
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kTable_Coarse_idx = 11, // Next table coarse value to read/write
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kTable_Fine_idx = 12, // Next table fine value to read/write
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kMax_idx
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};
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volatile uint8_t ctl_regs[] =
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{
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9, // 0 9=32 us period w/ 8Mhz clock (timer tick rate)
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123, // 1 (0-255) Tmr0_Coarse count of times timer count to 255 before loading Tmr0_Minor for final count.
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8, // 2 (0-254) Tmr0_Fine OCR1C value on final phase before triggering timer
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4, // 0 (1-5) 4=32us per tick
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123, // 1 (0-255) Timer 0 Coarse Value
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8, // 2 (0-255) Timer 0 Fine Value
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127, // 3 (0-255) Duty cycle
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4, // 4 (1-4) PWM Frequency (clock pre-scaler)
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9, // 5 9=32 us period w/ 8Mhz clock (timer tick rate)
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123, // 6 (0-255) Tmr1_Coarse count of times timer count to 255 before loading Tmr0_Minor for final count.
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8, // 7 (0-254) Tmr1_Fine OCR1C value on final phase before triggering timer
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127, // 8 (0-255) PWM1 Duty cycle
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254, // 9 (0-255) PWM1 Frequency (123 hz)
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0, // 10 (0-127) Next table addr to read/write
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0, // 11 (0-255) Next table coarse value to write
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0, // 12 (0-255) Next table fine value to write
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};
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// Tracks the current register pointer position
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volatile uint8_t reg_position = 0;
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const uint8_t reg_size = sizeof(ctl_regs);
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#define tableN 256
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uint8_t table[ tableN ];
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volatile uint8_t tmr_state = 0;
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volatile uint8_t tmr_coarse_cur = 0;
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void tmr_reset()
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//------------------------------------------------------------------------------
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//------------------------------------------------------------------------------
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//------------------------------------------------------------------------------
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//
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// EEPROM
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//
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void EEPROM_write(uint8_t ucAddress, uint8_t ucData)
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{
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if( ctl_regs[kTmr0_Coarse_idx] > 0 )
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{
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tmr_state = 1;
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OCR1C = 254;
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}
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else
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{
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tmr_state = 2;
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OCR1C = ctl_regs[kTmr0_Fine_idx];
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}
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// Wait for completion of previous write
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while(EECR & (1<<EEPE))
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{}
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tmr_coarse_cur = 0;
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EECR = (0<<EEPM1)|(0<<EEPM0); // Set Programming mode
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EEAR = ucAddress; // Set up address and data registers
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EEDR = ucData;
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EECR |= (1<<EEMPE); // Write logical one to EEMPE
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EECR |= (1<<EEPE); // Start eeprom write by setting EEPE
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}
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ISR(TIMER1_OVF_vect)
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uint8_t EEPROM_read(uint8_t ucAddress)
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{
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switch( tmr_state )
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// Wait for completion of previous write
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while(EECR & (1<<EEPE))
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{}
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EEAR = ucAddress; // Set up address register
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EECR |= (1<<EERE); // Start eeprom read by writing EERE
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return EEDR; // Return data from data register
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}
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//------------------------------------------------------------------------------
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//------------------------------------------------------------------------------
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//------------------------------------------------------------------------------
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//
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// Read/Write table
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//
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// To write table value 42 to 127 (coarse) 64 (fine)
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//
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// w 8 kTable_Addr_idx 42
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// w 8 kTable_Coarse_idx 127
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// w 8 kTable_fine_idx 64
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//
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// TO read table value 42
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// w 8 kTable_Addr_idx 42
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// r 8 kTable_Coarse_idx -> 127
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// r 8 kTable_Fine_idx -> 64
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#define eeprom_addr( addr ) (kMax_idx + (addr))
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void table_write_cur_value( void )
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{
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uint8_t tbl_addr = ctl_regs[ kTable_Addr_idx ] * 2;
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table[ tbl_addr+0 ] = ctl_regs[ kTable_Coarse_idx ];
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table[ tbl_addr+1 ] = ctl_regs[ kTable_Fine_idx ];
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EEPROM_write( eeprom_addr( tbl_addr+0 ), ctl_regs[ kTable_Coarse_idx ] );
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EEPROM_write( eeprom_addr( tbl_addr+1 ), ctl_regs[ kTable_Fine_idx ]);
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}
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void table_load( void )
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{
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uint8_t i = 0;
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for(; i<128; ++i)
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{
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uint8_t tbl_addr = i*2;
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table[tbl_addr+0] = EEPROM_read( eeprom_addr(tbl_addr+0) );
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table[tbl_addr+1] = EEPROM_read( eeprom_addr(tbl_addr+1) );
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}
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}
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void restore_memory_from_eeprom( void )
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{
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/*
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uint8_t i;
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for(i=0; i<kMax_idx; ++i)
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{
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ctl_regs[i] = EEPROM_read( eeprom_addr( i ) );
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}
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*/
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table_load();
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}
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//------------------------------------------------------------------------------
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//------------------------------------------------------------------------------
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//------------------------------------------------------------------------------
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//
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// Timer0
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//
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volatile uint8_t tmr0_state = 0; // 0=disabled 1=coarse mode, 2=fine mode
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volatile uint8_t tmr0_coarse_cur = 0;
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// Use the current tmr0 ctl_reg[] values to set the timer to the starting state.
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void tmr0_reset()
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{
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// if a coarse count exists then go into coarse mode
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if( ctl_regs[kTmr0_Coarse_idx] > 0 )
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{
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tmr0_state = 1;
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OCR0A = 0xff;
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}
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else // otherwise go into fine mode
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{
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tmr0_state = 2;
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OCR0A = ctl_regs[kTmr0_Fine_idx];
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}
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tmr0_coarse_cur = 0;
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}
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ISR(TIMER0_COMPA_vect)
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{
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switch( tmr0_state )
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{
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case 0:
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// disabled
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break;
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case 1:
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if( ++tmr_coarse_cur >= ctl_regs[kTmr0_Coarse_idx] )
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// coarse mode
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if( ++tmr0_coarse_cur >= ctl_regs[kTmr0_Coarse_idx] )
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{
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tmr_state = 2;
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OCR1C = ctl_regs[kTmr0_Fine_idx];
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tmr0_state = 2;
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OCR0A = ctl_regs[kTmr0_Fine_idx];
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}
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break;
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case 2:
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PINB = _BV(PINB4) + _BV(PINB1); // writes to PINB toggle the pins
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// fine mode
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PINB = _BV(PINB4); // writes to PINB toggle the pins
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tmr_reset();
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tmr0_reset(); // restart the timer
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break;
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}
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}
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void timer1_init()
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void timer0_init()
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{
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TIMSK &= ~_BV(TOIE1); // Disable interrupt TIMER1_OVF
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OCR1A = 255; // Set to anything greater than OCR1C (the counter never gets here.)
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TCCR1 |= _BV(CTC1); // Reset TCNT1 to 0 when TCNT1==OCR1C
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TCCR1 |= _BV(PWM1A); // Enable PWM A
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TCCR1 |= ctl_regs[kCS13_10_idx] & 0x0f; //
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GTCCR |= _BV(PSR1); // Set the pre-scaler to the selected value
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TIMSK &= ~_BV(OCIE0A); // Disable interrupt TIMER1_OVF
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TCCR0A |= 0x02; // CTC mode
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TCCR0B |= ctl_regs[kTmr0_Prescale_idx]; // set the prescaler
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tmr_reset();
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GTCCR |= _BV(PSR0); // Set the pre-scaler to the selected value
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TIMSK |= _BV(TOIE1); // Enable interrupt TIMER1_OVF
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tmr0_reset(); // set the timers starting state
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TIMSK |= _BV(OCIE0A); // Enable interrupt TIMER1_OVF
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}
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//------------------------------------------------------------------------------
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//------------------------------------------------------------------------------
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//------------------------------------------------------------------------------
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//
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// PWM (Timer0)
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//
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void pwm0_update()
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{
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OCR0B = ctl_regs[kPWM_Duty_idx]; // 50% duty cycle
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TCCR0B |= ctl_regs[kPWM_Freq_idx]; // PWM frequency pre-scaler
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OCR0B = ctl_regs[kPWM0_Duty_idx]; // 50% duty cycle
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TCCR0B |= ctl_regs[kPWM0_Freq_idx]; // PWM frequency pre-scaler
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}
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void pwm0_init()
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{
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//WGM[1:0] = 3 (TOP=255)
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// WGM[1:0] = 3 (TOP=255)
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// OCR0B = duty cycle (0-100%)
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// COM0A[1:0] = 2 non-inverted
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//
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@ -108,22 +246,170 @@ void pwm0_init()
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TCCR0A |= 0x20 + 3; // 0x20=non-inverting 3=WGM bits Fast-PWM mode (0=Bot 255=Top)
|
||||
TCCR0B |= 0x00 + 4; // 3=256 pre-scaler 122Hz=1Mghz/(v*256) where v=64
|
||||
|
||||
GTCCR |= _BV(PSR0); // Set the pre-scaler to the selected value
|
||||
|
||||
pwm0_update();
|
||||
|
||||
DDRB |= _BV(DDB1);
|
||||
|
||||
DDRB |= _BV(DDB1); // set direction on
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* This is called for each read request we receive, never put more
|
||||
* than one byte of data (with TinyWireS.send) to the send-buffer when
|
||||
* using this callback
|
||||
*/
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
//------------------------------------------------------------------------------
|
||||
//------------------------------------------------------------------------------
|
||||
//
|
||||
// Timer1
|
||||
//
|
||||
|
||||
volatile uint8_t tmr1_state = 0;
|
||||
volatile uint8_t tmr1_coarse_cur = 0;
|
||||
static uint8_t tmr1_init_fl = 0;
|
||||
|
||||
void tmr1_reset()
|
||||
{
|
||||
if( ctl_regs[kTmr1_Coarse_idx] > 0 )
|
||||
{
|
||||
tmr1_state = 1;
|
||||
OCR1C = 254;
|
||||
}
|
||||
else
|
||||
{
|
||||
tmr1_state = 2;
|
||||
OCR1C = ctl_regs[kTmr1_Fine_idx];
|
||||
}
|
||||
|
||||
tmr1_coarse_cur = 0;
|
||||
}
|
||||
|
||||
ISR(TIMER1_OVF_vect)
|
||||
{
|
||||
if( !tmr1_init_fl )
|
||||
{
|
||||
PORTB |= _BV(PINB3); // set PWM pin
|
||||
}
|
||||
else
|
||||
{
|
||||
switch( tmr1_state )
|
||||
{
|
||||
|
||||
case 0:
|
||||
// disabled
|
||||
break;
|
||||
|
||||
case 1:
|
||||
// coarse mode
|
||||
if( ++tmr1_coarse_cur >= ctl_regs[kTmr1_Coarse_idx] )
|
||||
{
|
||||
tmr1_state = 2;
|
||||
OCR1C = ctl_regs[kTmr1_Fine_idx];
|
||||
}
|
||||
break;
|
||||
|
||||
case 2:
|
||||
// fine mode
|
||||
PINB = _BV(PINB4); // writes to PINB toggle the pins
|
||||
|
||||
tmr1_reset();
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void timer1_init()
|
||||
{
|
||||
TIMSK &= ~_BV(TOIE1); // Disable interrupt TIMER1_OVF
|
||||
OCR1A = 255; // Set to anything greater than OCR1C (the counter never gets here.)
|
||||
TCCR1 |= _BV(CTC1); // Reset TCNT1 to 0 when TCNT1==OCR1C
|
||||
TCCR1 |= _BV(PWM1A); // Enable PWM A (to generate overflow interrupts)
|
||||
TCCR1 |= ctl_regs[kCS13_10_idx] & 0x0f; //
|
||||
GTCCR |= _BV(PSR1); // Set the pre-scaler to the selected value
|
||||
|
||||
tmr1_reset();
|
||||
tmr1_init_fl = 1;
|
||||
TIMSK |= _BV(TOIE1); // Enable interrupt TIMER1_OVF
|
||||
}
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
//------------------------------------------------------------------------------
|
||||
//------------------------------------------------------------------------------
|
||||
//
|
||||
// PWM1
|
||||
//
|
||||
// PWM is optimized to use pins OC1A ,~OC1A, OC1B, ~OC1B but this code
|
||||
// but since these pins are not available this code uses
|
||||
// ISR's to redirect the output to PIN3
|
||||
|
||||
void pwm1_update()
|
||||
{
|
||||
OCR1B = ctl_regs[kPWM1_Duty_idx]; // control duty cycle
|
||||
OCR1C = ctl_regs[kPWM1_Freq_idx]; // PWM frequency pre-scaler
|
||||
}
|
||||
|
||||
ISR(TIMER1_COMPB_vect)
|
||||
{
|
||||
PORTB &= ~(_BV(PINB3)); // clear PWM pin
|
||||
}
|
||||
|
||||
|
||||
void pwm1_init()
|
||||
{
|
||||
TIMSK &= ~(_BV(OCIE1B) + _BV(TOIE1)); // Disable interrupts
|
||||
|
||||
DDRB |= _BV(DDB3); // setup PB3 as output
|
||||
|
||||
// set on TCNT1 == 0 // happens when TCNT1 matches OCR1C
|
||||
// clr on OCR1B == TCNT // happens when TCNT1 matches OCR1B
|
||||
// // COM1B1=1 COM1B0=0 (enable output on ~OC1B)
|
||||
TCCR1 |= 9; // 32us period (256 divider) prescaler
|
||||
GTCCR |= _BV(PWM1B); // Enable PWM B and disconnect output pins
|
||||
GTCCR |= _BV(PSR1); // Set the pre-scaler to the selected value
|
||||
|
||||
pwm1_update();
|
||||
|
||||
TIMSK |= _BV(OCIE1B) + _BV(TOIE1); // Enable interrupts
|
||||
|
||||
|
||||
|
||||
}
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
//------------------------------------------------------------------------------
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
// Tracks the current register pointer position
|
||||
volatile uint8_t reg_position = 0;
|
||||
const uint8_t reg_size = sizeof(ctl_regs);
|
||||
|
||||
//
|
||||
// Read Request Handler
|
||||
//
|
||||
// This is called for each read request we receive, never put more
|
||||
// than one byte of data (with TinyWireS.send) to the send-buffer when
|
||||
// using this callback
|
||||
//
|
||||
void on_request()
|
||||
{
|
||||
// read and transmit the requestd position
|
||||
usiTwiTransmitByte(ctl_regs[reg_position]);
|
||||
uint8_t val = 0;
|
||||
|
||||
switch( reg_position )
|
||||
{
|
||||
case kTable_Coarse_idx:
|
||||
val = table[ ctl_regs[kTable_Addr_idx]*2 + 0 ];
|
||||
break;
|
||||
|
||||
case kTable_Fine_idx:
|
||||
val = table[ ctl_regs[kTable_Addr_idx]*2 + 1 ];
|
||||
break;
|
||||
|
||||
default:
|
||||
// read and transmit the requestd position
|
||||
val = ctl_regs[reg_position];
|
||||
|
||||
}
|
||||
|
||||
usiTwiTransmitByte(val);
|
||||
|
||||
// Increment the reg position on each read, and loop back to zero
|
||||
reg_position++;
|
||||
@ -135,14 +421,14 @@ void on_request()
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* The I2C data received -handler
|
||||
*
|
||||
* This needs to complete before the next incoming transaction (start,
|
||||
* data, restart/stop) on the bus does so be quick, set flags for long
|
||||
* running tasks to be called from the mainloop instead of running
|
||||
* them directly,
|
||||
*/
|
||||
//
|
||||
// The I2C data received -handler
|
||||
//
|
||||
// This needs to complete before the next incoming transaction (start,
|
||||
// data, restart/stop) on the bus does so be quick, set flags for long
|
||||
// running tasks to be called from the mainloop instead of running
|
||||
// them directly,
|
||||
//
|
||||
|
||||
void on_receive( uint8_t byteN )
|
||||
{
|
||||
@ -174,22 +460,46 @@ void on_receive( uint8_t byteN )
|
||||
// pointer is now pointing to the first byte to write to
|
||||
while(byteN--)
|
||||
{
|
||||
// write the value
|
||||
ctl_regs[reg_position] = usiTwiReceiveByte();
|
||||
|
||||
if( kCS13_10_idx <= reg_position && reg_position <= kTmr0_Fine_idx )
|
||||
timer1_init();
|
||||
// Set timer 1
|
||||
if( kTmr0_Prescale_idx <= reg_position && reg_position <= kTmr0_Fine_idx )
|
||||
{ timer0_init(); }
|
||||
else
|
||||
if( kPWM_Duty_idx <= reg_position && reg_position <= kPWM_Freq_idx )
|
||||
pwm0_update();
|
||||
|
||||
|
||||
// Set PWM 0
|
||||
if( kPWM0_Duty_idx <= reg_position && reg_position <= kPWM0_Freq_idx )
|
||||
{ pwm0_update(); }
|
||||
else
|
||||
|
||||
// Set timer 1
|
||||
if( kCS13_10_idx <= reg_position && reg_position <= kTmr1_Fine_idx )
|
||||
{ timer1_init(); }
|
||||
else
|
||||
|
||||
// Set PWM 1
|
||||
if( kPWM1_Duty_idx <= reg_position && reg_position <= kPWM1_Freq_idx )
|
||||
{ pwm1_update(); }
|
||||
else
|
||||
|
||||
|
||||
// Write table
|
||||
if( reg_position == kTable_Fine_idx )
|
||||
{ table_write_cur_value(); }
|
||||
|
||||
reg_position++;
|
||||
|
||||
if (reg_position >= reg_size)
|
||||
{
|
||||
reg_position = 0;
|
||||
}
|
||||
|
||||
|
||||
}
|
||||
|
||||
|
||||
}
|
||||
|
||||
|
||||
@ -198,14 +508,18 @@ int main(void)
|
||||
{
|
||||
cli(); // mask all interupts
|
||||
|
||||
DDRB |= _BV(DDB4) + _BV(DDB1); // setup PB4 as output
|
||||
PORTB &= ~(_BV(PINB4) + _BV(PINB1));
|
||||
|
||||
timer1_init();
|
||||
pwm0_init();
|
||||
restore_memory_from_eeprom();
|
||||
|
||||
DDRB |= _BV(DDB4) + _BV(DDB3) + _BV(DDB1); // setup PB4,PB3,PB1 as output
|
||||
PORTB &= ~(_BV(PINB4) + _BV(PINB3) + _BV(PINB1)); // clear output pins
|
||||
|
||||
|
||||
timer0_init();
|
||||
pwm1_init();
|
||||
|
||||
// setup i2c library
|
||||
usi_onReceiverPtr = on_receive; //on_receive;
|
||||
usi_onReceiverPtr = on_receive;
|
||||
usi_onRequestPtr = on_request;
|
||||
usiTwiSlaveInit(I2C_SLAVE_ADDRESS);
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user