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@@ -9,17 +9,23 @@
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#define I2C_SLAVE_ADDRESS 0x8 // the 7-bit address (remember to change this when adapting this example)
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+
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enum
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{
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- kCS13_10_idx = 0, // Timer 1 Prescalar (CS13,CS12,CS11,CS10) from Table 12-5 pg 89
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- kOCR1C_idx = 1, // OCR1C timer match value
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-
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+ kCS13_10_idx = 0, // Timer 1 Prescalar (CS13,CS12,CS11,CS10) from Table 12-5 pg 89
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+ kTmr0_Coarse_idx = 1, // count of times timer0 count to 255 before OCR1C is set to Tmr0_Minor
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+ kTmr0_Fine_idx = 2, // OCR1C timer match value
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+ kPWM_Duty_idx = 3, //
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+ kPWM_Freq_idx = 4, // 1-4 = clock divider=1=1,2=8,3=64,4=256,5=1024
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};
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volatile uint8_t ctl_regs[] =
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{
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- 0x0f, // clk/16384
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- 244, // OCR1C
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+ 0x0f, // 0 (0-15) timer prescalar 0=stop, prescaler = pow(2,val-1), 0=stop,1=1,2=2,3=4,4=8,....14=8192,15=16384 pre_scaled_hz = clock_hz/value
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+ 0, // 1 (0-255) Tmr0_Coarse count of times timer count to 255 before loading Tmr0_Minor for final count.
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+ 244, // 2 (0-254) Tmr0_Fine OCR1C value on final phase before triggering timer
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+ 127, // 3 (0-255) Duty cycle
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+ 4, // 4 (1-4) PWM Frequency (clock pre-scaler)
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};
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// Tracks the current register pointer position
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@@ -28,20 +34,42 @@ const uint8_t reg_size = sizeof(ctl_regs);
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ISR(TIMER1_OVF_vect)
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{
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- PINB = _BV(PINB4); // writes to PINB toggle the pins
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+ PINB = _BV(PINB4) + _BV(PINB1); // writes to PINB toggle the pins
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+
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}
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-void timer_init()
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+
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+void timer1_init()
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{
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TIMSK &= ~_BV(TOIE1); // Disable interrupt TIMER1_OVF
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OCR1A = 255; // Set to anything greater than OCR1C (the counter never gets here.)
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TCCR1 |= _BV(CTC1); // Reset TCNT1 to 0 when TCNT1==OCR1C
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TCCR1 |= _BV(PWM1A); // Enable PWM A
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- TCCR1 |= ctl_regs[kCS13_10_idx] & 0x0f;
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- OCR1C = ctl_regs[kOCR1C_idx];
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+ TCCR1 |= ctl_regs[kCS13_10_idx] & 0x0f; //
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+ OCR1C = ctl_regs[kTmr0_Fine_idx];
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TIMSK |= _BV(TOIE1); // Enable interrupt TIMER1_OVF
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}
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+void pwm0_update()
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+{
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+ OCR0B = ctl_regs[kPWM_Duty_idx]; // 50% duty cycle
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+ TCCR0B |= ctl_regs[kPWM_Freq_idx]; // PWM frequency pre-scaler
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+}
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+
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+void pwm0_init()
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+{
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+ //WGM[1:0] = 3 (TOP=255)
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+ // OCR0B = duty cycle (0-100%)
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+ // COM0A[1:0] = 2 non-inverted
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+ //
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+
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+ TCCR0A |= 0x20 + 3; // 0x20=non-inverting 3=WGM bits Fast-PWM mode (0=Bot 255=Top)
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+ TCCR0B |= 0x00 + 4; // 3=256 pre-scaler 122Hz=1Mghz/(v*256) where v=64
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+
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+ pwm0_update();
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+
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+ DDRB |= _BV(DDB1);
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+}
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/**
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@@ -74,14 +102,14 @@ void on_request()
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* them directly,
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*/
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-void on_receive( uint8_t howMany )
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+void on_receive( uint8_t byteN )
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{
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- if (howMany < 1)
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+ if (byteN < 1)
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{
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// Sanity-check
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return;
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}
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- if (howMany > TWI_RX_BUFFER_SIZE)
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+ if (byteN > TWI_RX_BUFFER_SIZE)
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{
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// Also insane number
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return;
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@@ -90,24 +118,28 @@ void on_receive( uint8_t howMany )
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// get the register index to read/write
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reg_position = usiTwiReceiveByte();
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- howMany--;
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+ byteN--;
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// If only one byte was received then this was a read request
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// and the buffer pointer (reg_position) is now set to return the byte
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// at this location on the subsequent call to on_request() ...
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- if (!howMany)
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+ if (!byteN)
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{
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return;
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}
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// ... otherwise this was a write request and the buffer
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// pointer is now pointing to the first byte to write to
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- while(howMany--)
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+ while(byteN--)
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{
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ctl_regs[reg_position] = usiTwiReceiveByte();
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- if(reg_position == kCS13_10_idx || reg_position == kOCR1C_idx )
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- timer_init();
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+ if( kCS13_10_idx <= reg_position && reg_position <= kTmr0_Fine_idx )
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+ timer1_init();
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+
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+ if( kPWM_Duty_idx <= reg_position && reg_position <= kPWM_Freq_idx )
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+ pwm0_update();
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+
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reg_position++;
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if (reg_position >= reg_size)
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@@ -124,11 +156,12 @@ int main(void)
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{
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cli(); // mask all interupts
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- DDRB |= _BV(DDB4); // setup PB4 as output
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- PORTB &= ~_BV(PINB4);
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-
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- timer_init();
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+ DDRB |= _BV(DDB4) + _BV(DDB1); // setup PB4 as output
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+ PORTB &= ~(_BV(PINB4) + _BV(PINB1));
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+ timer1_init();
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+ pwm0_init();
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+
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// setup i2c library
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usi_onReceiverPtr = on_receive; //on_receive;
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usi_onRequestPtr = on_request;
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